Items where Author is "Hoo, C.S."

Up a level
Export as [feed] Atom [feed] RSS 1.0 [feed] RSS 2.0
Group by: Item Type | No Grouping
Number of items: 1.

Hoo, C.S. and Kanesan, J. and Ramiah, H. (2015) Cost reduction in bottom-up hierarchical-based VLSI floorplanning designs. International Journal of Circuit Theory and Applications, 43 (3). pp. 286-306. ISSN 0098-9886, DOI https://doi.org/10.1002/cta.1939.

This list was generated on Wed Dec 25 12:17:19 2024 +08.
UM Research Repository is powered by EPrints 3 which is developed by the School of Electronics and Computer Science at the University of Southampton. More information and software credits.