A 23.3 dBm CMOS power amplifier with third-order gm cancellation linearization technique achieving OIP3 of 34 dBm

Mariappan, Selvakumar and Rajendran, Jagadheswaran and Mohd Noh, Norlaili and Yusof, Yusman and Aridas, Narendra Kumar (2022) A 23.3 dBm CMOS power amplifier with third-order gm cancellation linearization technique achieving OIP3 of 34 dBm. Circuit World, 48 (2). pp. 215-222. ISSN 0305-6120, DOI https://doi.org/10.1108/CW-08-2020-0209.

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Purpose The purpose of this paper is to implement a highly linear 180 nm complementary metal oxide semiconductor (CMOS) power amplifier (PA) to meet the stringent linearity requirement of an long term evolution (LTE) signal with minimum trade-off to power added efficiency (PAE). Design/methodology/approach The CMOS PA is designed in a cascaded dual-stage configuration comprises a driver amplifier and a main PA. The gate voltage (VGS) of the driver amplifier is tuned to optimize its positive third-order transconductance (g(m3)) to be canceled with the main PA's fixed negative g(m3). The g(m3) cancellation between these stages mitigates the third-order intermodulation product (IMD3) that contributes to enhanced linearity. Findings For driver's VGS of 0.82 V with continuous wave signal, the proposed PA achieved a power gain of 14.5 dB with a peak PAE of 31.8% and a saturated output power of 23.3 dBm at 2.45 GHz. A maximum third-order output intercept point of 34 dBm is achieved at 20.2 dBm output power with a corresponding IMD3 of -33.4 dBc. When tested with a 20 MHz LTE signal, the PA delivers 19 dBm maximum linear output power for an adjacent channel leakage ratio specification of -30 dBc. Originality/value In this study, a novel cascaded g(m3) cancellation technique has been implemented to achieve a maximum linear output power under modulated signals.

Item Type: Article
Funders: SilTerra Sdn. Bhd., USM [Grant No: 1001/PCEDEC/8014079], Ministry of Higher Education & Scientific Research (MHESR) [Grant No: 1001/PCEDEC/6071449], Collaborative Research in Engineering, Science and Technology (CREST) [Grant No: 304/PELECT/6050378/C121]
Uncontrolled Keywords: CMOS; Long term evolution; Power added efficiency; Power amplifier
Subjects: T Technology > T Technology (General)
Divisions: Faculty of Engineering > Department of Electrical Engineering
Depositing User: Ms. Juhaida Abd Rahim
Date Deposited: 10 Oct 2023 05:36
Last Modified: 10 Oct 2023 05:36
URI: http://eprints.um.edu.my/id/eprint/42465

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