Dc-Dc buck and boost converter design issues in recent VLSI platform

Iqbal, S.M. Asif and Mekhilef, Saad and Soin, Norhayati and Omar, Rosli (2011) Dc-Dc buck and boost converter design issues in recent VLSI platform. In: 2011 IEEE Regional Symposium on Micro and Nano Electronics, RSM 2011, Kota Kinabalu, Sabah.

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Abstract

This paper presents the feasibility challenges of designing dc-dc buck and boost converter in nano-scale. With the gradual development of VLSI design platforms, new issues have been introduced and presented to the power electronics circuit experts and VLSI engineers. Today's VLSI industry has reached the technology well within the nano-meter range. The consequence of implementing the basic power electronics converter topology such as buck and boost converter into this technology is discussed in this paper. It also covers the optimization issues between conduction modes, switching frequencies, efficiency and chip area. Fabrication issues are discussed, with the limitations of use of elements such as inductor, capacitors and resistors. Tradeoffs between chip area and performance are highlighted. Design challenge for optimum switching frequency, off the chip capacitor, and strategies to minimize switching and conduction losses are also discussed.

Item Type:	Conference or Workshop Item (Paper)
Funders:	UNSPECIFIED
Additional Information:	Conference code: 87842 Export Date: 16 November 2012 Source: Scopus Art. No.: 6088309 doi: 10.1109/RSM.2011.6088309 Language of Original Document: English Correspondence Address: Iqbal, S.M.A.; Department of Electrical Engineering, University of Malaya Kuala LumpurMalaysia; email: asif.iqbal@siswa.um.edu.my References: Musunuri, S., Chapman, P.L., Optimization issues for fully-integrated CMOS DC-DC converters (2002) Conference Record - IAS Annual Meeting (IEEE Industry Applications Society), 4, pp. 2405-2410; Fujita, S., Nano-electronics Challenge Chip Designers Meet Real Nano-electronics in 2010s?, , Toshiba Corporation, Corporate R&D Center, Kawasaki, Japan shinobu. fujita@toshiba. co. jp/; Alimadadi, M., Sheikhaei, S., Lemieux, G., Mirabbasi, S., Palmer, P., A 3 GHZ switching DC-DC converter using clock-tree chargerecycling in 90 nm CMOS with integrated output filter (2007) IEEE ISSCC Dig. Tech. Papers, pp. 532-533; Chakraborty, A., Emadi, A., Quantum sizing of power electronics: A trend towards miniaturization of power electronic systems and equipments (2005) Material Research Society Symposium Proceedings, 872. , Materials Research Society, pages: J18. 28. 1-J18. 28. 6; Shi, C., Walker, B.C., Zeisel, E., Hu, B., McAllieter, G.H., A Highly Integrated Power Management IC for advanced Mobile Applications (2007) IEEE Journal of Solid State Circuits, 42 (8), pp. 1723-1731. , August; Munsuri, S., Chapman, P.L., Multi layer spiral inductor design for monolithic dc-dc converters (2003) Proc. Conf. Record IEEE Industrial Applications Society Annu. Conf., pp. 1270-1275; Hazucha, P., Schromm, G., Hahn, J., A 233-MHz 80-87 Efficient four phase Dc-Dc converter utilizing air-core inductors on package (2005) IEEE Journal of Solid State Circuits, 40 (4). , April; Chen, Z.J., Liu, C., Schutt-Aine, J., Plastic deformation magnetic assembly (PDMA)of out of plane microstructures: Technology & applications J. Microelec. Mech. Systems, 10 (2), pp. 302-200; Abedinpour, S., Trivedi, M., Shenai, K., DC-DC power converter for monolithic implementation (2000) Conference Record - IAS Annual Meeting (IEEE Industry Applications Society), 4, pp. 2471-2475; Alarcon, E., Contributions on converter integrated components and detailed models (2010) CMOS Integrated Switching Power Converters: A Structured Design Approach, pp. 26-85. , By Gerard Villar Pique. NY: Springer Print; Mekhilef, S., Omar, A.M., Rahim, N.A., Modelling of three-phase uniform symetrical sampling digital PWM for power converter (2007) IEEE Transactions on Industrial Electronics, 54 (1). , February Sponsors: Silterra Malaysia Sdn Bhd
Uncontrolled Keywords:	Boost converter, Dc-Dc Buck, Efficiency, Switching frequency, VLSI design, Buck-and-boost converter, Chip areas, Chip capacitor, Conduction loss, Conduction mode, Design challenges Nano scale, Power electronics circuits, Power electronics converters, VLSI industry, Capacitors, DC power transmission, Design, Power electronics, DC-DC converters.
Subjects:	T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:	Faculty of Engineering
Depositing User:	Mr Jenal S
Date Deposited:	13 Feb 2013 01:29
Last Modified:	25 Oct 2019 04:01
URI:	http://eprints.um.edu.my/id/eprint/4781

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