Gunasegaran, Premmilaah and Rajendran, Jagadheswaran and Mariappan, Selvakumar and Sal Hamid, Sofiyah and Kumar, Narendra (2023) A 23 dBm gain Shaping stacked power block CMOS power amplifier achieving 36% PAE. IETE Journal of Research, 69 (9). pp. 6247-6254. ISSN 0377-2063, DOI https://doi.org/10.1080/03772063.2021.1986149.
Full text not available from this repository.Abstract
This paper introduces a design methodology that reduces the fundamental trade-off between linearity and power added efficiency (PAE) in CMOS power amplifier (PA). In our work, a stacked power block (SPB) has been proposed to mitigate the effect of gate-source capacitance (Cgs), thus linearizing the PA. Each stage is biased independently to shape the gain profile, either to be in the expanded mode or in the compressed mode, in which once combined it delivers a flat gain response and confirming the linearity performance. Efficient PI input and output matching networks are proposed to ensure no further distortion, once connected to the 50 omega source and load. The PA achieves input and output return losses of less than -10 dB from 2.40 to 2.50 GHz. At the center frequency of 2.45 GHz, the SPB-PA achieves a gain of 10 dB and it is unconditionally stable. The proposed gain shaping linearization technique delivers a maximum linear output power (Poutlinmax) of 19.8 dBm with only 3.3 dB back-off from maximum output power (Poutmax) of 23.1 dBm. The SPB-PA meets the WLAN specification with linear PAE of 30% and peak PAE of 36.1%. The proposed SPB-PA reduces the fundamental trade-off between linearity and efficiency. Integration of this PA in wireless SoC shall reduce the chip's overall power consumption.
| Item Type: | Article |
|---|---|
| Funders: | Collaborative Research in Engineering, Science and Technology (CREST Malaysia) [Grant No: PCEDEC/6050415], Universiti Sains Malaysia through Research University (Individual) [Grant No: RUI 1001/PCEDEC/8014079], Ministry of Education, Malaysia [Grant No: FRGS 1001/PCEDEC/6071449] |
| Uncontrolled Keywords: | CMOS; Efficiency; Gain shaping; Linearity; Power amplifier; Power added efficiency (PAE); Stacked power block (SPB); Third-order intercept point (OIP3); WLAN |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Faculty of Engineering > Department of Electrical Engineering |
| Depositing User: | Ms. Juhaida Abd Rahim |
| Date Deposited: | 03 Nov 2025 08:22 |
| Last Modified: | 03 Nov 2025 08:22 |
| URI: | http://eprints.um.edu.my/id/eprint/48562 |
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