Jaafar, Anuar and Soin, Norhayati and Wan Muhamad Hatta, Sharifah Fatmadiana and Salim, Sani Irwan and Zakaria, Zahriladha (2021) Multipoint detection technique with the best clock signal closed-loop feedback to prolong FPGA performance. Applied Sciences-Basel, 11 (14). ISSN 2076-3417, DOI https://doi.org/10.3390/app11146417.
Full text not available from this repository.Abstract
The degradation effect of a field-programmable gate array becomes a significant issue due to the high density of logic circuits inside the field-programmable gate array. The degradation effect occurs because of the rapid technology scaling process of the field-programmable gate array while sustaining its performance. One parameter that causes the degradation effect is the delay occurrence caused by the hot carrier injection and negative bias temperature instability. As such, this research proposed a multipoint detection technique that detects the delay occurrence caused by the hot carrier injection and negative bias temperature instability degradation effects. The multipoint detection technique also assisted in signaling the aging effect on the field-programmable gate array caused by the delay occurrence. The multipoint detection technique was also integrated with a method to optimize the performance of the field-programmable gate array via an automatic clock correction scheme, which could provide the best clock signal for prolonging the field-programmable gate array performance that degraded due to the degradation effect. The delay degradation effect ranged from 0 degrees to 360 degrees phase shifts that happened in the field-programmable gate array as an input feeder into the multipoint detection technique. With the ability to provide closed-loop feedback, the proposed multipoint detection technique offered the best clock signal to prolong the field-programmable gate array performance. The results obtained using the multipoint detection technique could detect the remaining lifetime of the field-programmable gate array and propose the best possible signal to prolong the field-programmable gate array's performance. The validation showed that the multipoint detection technique could prolong the performance of the degraded field-programmable gate array by 13.89%. With the improvement shown using the multipoint detection technique, it was shown that compensating for the degradation effect of the field-programmable gate array with the best clock signal prolonged the performances.
| Item Type: | Article |
|---|---|
| Funders: | Faculty of Engineering at the University of Malaya, Centre for Research and Innovation Management (CRIM) at the Universiti Teknikal Malaysia Melaka (UTeM), Faculty of Electronics and Computer Engineering |
| Uncontrolled Keywords: | Aging sensor; Clock correction; FPGA; Verilog programming |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Faculty of Engineering > Department of Electrical Engineering |
| Depositing User: | Ms Zaharah Ramly |
| Date Deposited: | 22 Jun 2022 08:33 |
| Last Modified: | 22 Jun 2022 08:33 |
| URI: | http://eprints.um.edu.my/id/eprint/27978 |
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