A simple THD minimization technique for transistor-clamped H-bridge-based cascaded multilevel inverter

Halim, Wahidah Abd and Rahim, Nasrudin Abd and Alias, Azrita (2018) A simple THD minimization technique for transistor-clamped H-bridge-based cascaded multilevel inverter. Journal of Telecommunication, Electronic and Computer Engineering, 10 (1-3). pp. 69-74. ISSN 2180-1843,

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Official URL: http://journal.utem.edu.my/index.php/jtec/article/...

Abstract

This paper presents a simple modulation technique that minimizes the output voltage total harmonic distortion (THD) without eliminating the lowest order harmonics. It uses the voltage-angle equal concept of sinusoidal reference waveform to generate the step output voltage of a single-phase transistor-clamped H-bridge (TCHB)-based cascaded multilevel inverter. The real implementation of the modulation technique for a various range of modulation indices is built using an Altera field-programmable gate array (FPGA). It is found that the proposed modulation method resulted in a dramatic decrease in the inverter’s output voltage THD when increasing the number of output steps up to thirteen levels.

Item Type: Article
Funders: Universiti Teknikal Malaysia Melaka (UTeM), University of Malaya (UM), Ministry of Higher Education for supporting this research under FRGS (FRGS/1/2015/TK04/FKE/03/F00256)
Uncontrolled Keywords: Multilevel inverter; THD minimization; Total Harmonic Distortion (THD)
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Deputy Vice Chancellor (Research & Innovation) Office > UM Power Energy Dedicated Advanced Centre
Depositing User: Ms. Juhaida Abd Rahim
Date Deposited: 14 Oct 2019 09:28
Last Modified: 14 Oct 2019 09:28
URI: http://eprints.um.edu.my/id/eprint/22756

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