Ahmed, R.A. and Mekhilef, Saad and Ping, H.W.
(2010)
*New multilevel inverter topology with minimum number of switches.*
In: 2010 IEEE Region 10 Conference, TENCON 2010, Fukuoka.

PDF (New multilevel inverter topology with minimum number of switches)
New_multilevel_inverter_topology_with_minimum_number_of_switches.pdf - Published Version Restricted to Registered users only Download (2MB) | Request a copy |

## Abstract

This paper presents two types of multilevel inverters, known as symmetrical and asymmetrical multilevel inverter. Both types are very effective and efficient for improving the quality of the inverter output voltage. Firstly, we describe briefly the structural parts of the inverter then switching strategy and operational principles of the proposed inverter are explained and operational topologies are given. The proposed topology reduces the number of switches, losses, installation area and converter cost. Finally, the simulation results are provided to validate the proposed theory.

Item Type: | Conference or Workshop Item (Paper) |
---|---|

Additional Information: | Conference code: 83758 Cited By (since 1996): 1 Export Date: 16 November 2012 Source: Scopus Art. No.: 5686368 CODEN: 85QXA doi: 10.1109/TENCON.2010.5686368 Language of Original Document: English Correspondence Address: Ahmed, R. A.; Department of Electrical Engineering, University of Malaya, 50603 Kuala Lumpur, Malaysia; email: RokanL4@yahoo.com References: Beser, E., Camur, S., Arifoglu, B., Beser, E.K., Design and application of a novel structure and topology for multilevel inverter (2008) Proc. IEEE SPEEDAM, pp. 969-974. , Tenerife, Spain; Kim, T.-J., Kang, D.-W., Lee, Y.-H., Hyun, D.-S., The analysis of conduction and switching losses in multi-level inverter system (2001) PESC Record - IEEE Annual Power Electronics Specialists Conference, 3, pp. 1363-1368; Baker, R.H., (1980) High-Voltage Converter Circuit, , U.S. Patent Number 4, 203, 151, May; Ahmed, M.E., Mekhilef, S., Design and implementation of a multilevel three-Phase inverter with less switches and low output voltage distortion (2009) Journal of Power Electronics, 9 (4), pp. 593-603. , Jul; Mekhilef, S., Kadir, M.N.A., Voltage control of three-stage hybrid multilevel inverter using vector transformation (2010) IEEE Transactions on Power Electronics, , http://ieeexplore.ieee.org, DOI: 10.1109/TPEL.2010.2051040(in press), available online at; Daher, S., Schmid, J., Antunes, F.L.M., Multilevel inverter topologies for stand-alone PV systems (2008) IEEE Trans. Ind. Electron., 55 (7), pp. 2703-2712. , Aug; Kadir, M.N.A., Mekhilef, S., Ping, H.W., Voltage vector control of a hybrid three-stage eighteen-level inverter by vector decomposition (2010) IET Trans. Power Electron., 3 (4), pp. 601-611; Rodriguez, J., Lai, J.S., Peng, F.Z., Multilevel inverters: Survey of topologies, controls, and applications (2002) IEEE Trans. Ind. Applicat., 49 (4), pp. 724-738. , Aug; Baker, R.H., Bannister, L.H., (1975) Electric Power Converter, , U.S. Patent 3 867 643, Feb; Babaei, E., Hosseini, S.H., New cascaded multilevel inverter topology with minimum number of switches (2009) Elsevier J. Energy Conversion and Management, 55 (11), pp. 2761-2767; Abdul Kadir, M.N., Mekhilef, S., Ping, H.W., Dual vector control strategy for a three-stage hybrid cascaded multilevel inverter (2010) Journal of Power Electronic, 10 (2), pp. 155-164; Mekhilef, S., Omar, A.M., Rahim, N.A., Modeling of three-phase uniform symmetrical sampling digital PWM for power converter (2007) IEEE Transactions on Industrial Electronics, 54 (1), pp. 427-432. , DOI 10.1109/TIE.2006.885151; Mekhilef, S., Abdul Kadir, M.N., Novel vector control method for three-stage hybrid cascaded multilevel inverter (2010) IEEE Transactions on Industrial Electronics, , http://ieeexplore.ieee.org, DOI: 10.1109/TIE.2010.2049716 (in press), available online at; Tolbert, L.M., Peng, F.Z., Multilevel converters as a utility interface for renewable energy systems (2000) Proc. IEEE Power Eng. Soc. Summer Meeting, 2, pp. 1271-1274; Hosseini Aghdam, M.G., Fathi, S.H., Gharehpetian, G.B., Comparison of OMTHD and OHSW harmonic optimization techniques in multi-level voltage-source inverter with non-equal DC sources (2007) Proc. 7th IEEE Power Electron. Spec. Conf. (ICPE), pp. 587-591; Du, Z., Tolbert, L.M., Chiasson, J.N., Ozpineci, B., A cascade multilevel inverter using a single DC source (2006) Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, 2006, pp. 426-430. , 1620573, Twenty-First Annual IEEE Applied Power Electronics Conference and Exposition, APEC '06; Sinha, G., Lipo, T.A., A four level rectifier-inverter system for drive applications (1996) Conf. Rec. 31st IEEE IAS Annu. Meeting, 2, pp. 980-987; Klabunde, M., Zhao, Y., Lipo, T.A., Current control of a 3 level rectifier/inverter drive system (1994) Conf. Rec. IEEE IAS Annu. Meeting, 2, pp. 859-866; Babaei, E., A cascade multilevel converter topology with reduced number of switches (2008) IEEE Trans. Power Electron., 23 (6), pp. 2657-2664. , Nov; Babaei, E., Hosseini, S.H., Gharehpetian, G.B., Haque, M.T., Sabahi, M., Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology (2007) Electric Power Systems Research, 77 (8), pp. 1073-1085. , DOI 10.1016/j.epsr.2006.09.012, PII S0378779606002185; Park, S.J., Kang, F.S., Lee, M.H., Kim, C.U., A new single-phase five-level PWM inverter employing a deadbeat control scheme (2003) IEEE Trans. Power Electron., 18 (18), pp. 831-843. , May; Sivakumar, K., Das, A., Ramchand, R., A simple fivelevel inverter topology for induction motor drive using conventional two-level inverters and flying capacitor technique (2009) Proc. IEEE PESC, pp. 1009-1013. , Chintan; Gopakumar; Kang, D.W., Hyun, D.S., Simple harmonic analysis method for multi-carrier PWM techniques using output phase voltage in multi-level inverter (2005) IEE Proceedings: Electric Power Applications, 152 (2), pp. 157-165. , DOI 10.1049/ip-epa:20045153; Kang, D.W., Lee, Y.H., Suh, B.S., Choi, C.H., Hyun, D.S., An improved carrierwave-based SVPWM method using phase voltage redundancies for generalized cascaded multilevel inverter topology (2000) Proc. IEEE APEC, pp. 542-548 Sponsors: IEEE Fukuoka Section; IEEE Region 10 |

Uncontrolled Keywords: | Asymmetrical multilevel inverter, Bidirectional switch, Cascade Multilevel Inverter (CMLI), Total Harmonic Distortion (THD), Cascade multilevel inverter, Multilevel inverter, Multilevel inverter topology, Number of switches, Operational principles, Output voltages, Simulation result, Structural parts, Switching strategies, Harmonic distortion, Topology, Wave filters, Electric inverters. |

Subjects: | T Technology > TA Engineering (General). Civil engineering (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |

Divisions: | Faculty of Engineering |

Depositing User: | Mr Jenal S |

Date Deposited: | 14 Feb 2013 00:50 |

Last Modified: | 25 Oct 2019 03:54 |

URI: | http://eprints.um.edu.my/id/eprint/4828 |

### Actions (login required)

View Item |