Wong, Goon Weng and Soin, Norhayati (2024) Improved Q-Factor 3D Double-Layered On-Chip Resistor with Shielded Ground Conductor. IETE Journal of Research, 70 (3). pp. 2859-2870. ISSN 0377-2063, DOI https://doi.org/10.1080/03772063.2023.2187464.
Full text not available from this repository.Abstract
In this paper, a double-layered structure to form an N-Well meander-line structure by added shielding grounded conductor to improve the quality factor on-chip resistors in high frequency operation is presented. An additionally added shielding ground conductor is applied to the proposed structure to reduce the induced capacitance coupling. and substrate losses for further improvement of the Q factor were also presented. Sonnet EM simulation result validated that double-layered structure via the shielding ground conductor was effective to improve their quality factors by 37.8% from 1.209 to -0.752 and reducing capacitance coupling effect by 57.92% from 55.23fF to 23.24fF during operating frequency at 10 GHz compared with conventional N-Well meander-line resistors. A novel structure in the design of a double-layered on-chip resistor with a shielding grounded conductor showed that capacitance coupling of parasitic effect was reduced; therefore, a low Q factor in high-frequency operations was obtained.
| Item Type: | Article |
|---|---|
| Funders: | UNSPECIFIED |
| Uncontrolled Keywords: | Capacitance coupling; double-layered; meander line resistor; on-chip resistor; Q factor; shielding ground conductor |
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Faculty of Engineering > Department of Electrical Engineering |
| Depositing User: | Ms. Juhaida Abd Rahim |
| Date Deposited: | 30 Dec 2024 04:59 |
| Last Modified: | 30 Dec 2024 04:59 |
| URI: | http://eprints.um.edu.my/id/eprint/47176 |
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