Siddiqui, M.F. and Reza, A.W. and Kanesan, J. and Omer, H. (2014) A new parameterized architectural design for SENSE reconstruction. In: Proceedings of the 3rd International Conference on Computer Engineering & Mathematical Sciences (ICCEMS 2014), 04-05 Dec 2014, Langkawi, Malaysia.
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Abstract
Reconfigurable hardware based architectures that could provide good quality image reconstruction for parallel Magnetic Resonance Imaging (MRI) within very less computation time are in high demand. Hardware platforms for specific reconstruction algorithms dramatically increase the power efficiency and decrease the execution time. This research proposes a new parameterized architecture design for Sensitivity Encoding (SENSE) reconstruction. This architecture is also synthesized for Field Programmable Gate Array (FPGA). Complex multiplier, divider and complex matrix multiplier modules are designed to implement the algorithm. Furthermore, the variable data bus widths are used in the data path of the architecture, which leads to reduce the hardware cost and silicon area. Experimental results and comparisons prove the efficiency of the architecture. Moreover, in terms of computation time, the result shows that the proposed technique is 1000 times faster than the conventional MATLAB reconstruction, while maintaining the quality of the reconstructed image. The results indicate that this architectural design can prove to be a significant tool for SENSE reconstruction in MRI scanners.
Item Type: | Conference or Workshop Item (Paper) |
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Funders: | UNSPECIFIED |
Uncontrolled Keywords: | MRI, Parallel MRI, SENSE, FPGA, HDL. |
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Divisions: | Faculty of Engineering |
Depositing User: | Mr. Mohd Samsul Ismail |
Date Deposited: | 11 Mar 2015 00:59 |
Last Modified: | 11 Mar 2015 00:59 |
URI: | http://eprints.um.edu.my/id/eprint/12967 |
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